Certifying proofs for SAT-based model checking

In the context of formal verification, certifying proofs are evidences correctness a model in deduction system produced automatically as outcome verification. They quite appealing for high-assurance systems because they can be verified independently by proof checkers, which usually simpler to certify than proof-generating tools. Model checking is one most prominent approaches verification temporal properties and based on an algorithmic search state space. Although modern algorithms integrate deductive methods, generation typically restricted invariant only. Moreover, it assumes that produces inductive original system, while checkers involve variety complex pre-processing simplifications. this paper we show how, exploiting k-liveness algorithm, extend capabilities cover full linear-time logic (LTL) properties, simple efficient manner, with essentially no overhead checker. Besides basic widely used techniques such decomposition, simplification via computation equivalences ternary simulation, use stabilizing constraints. These essential many cases prove property holds, both LTL checking, thus need considered within proof. We implemented top IC3 engines, feasibility approach benchmarks taken from literature Hardware Checking Competition. Our results confirm negligible